This invention pertains to a method of fabricating heterojunction bipolar transistor (HBT) integrated circuits with Schottky diodes.
In recent years, there has been increasing interest in AlGaAs/GaAs heterojunction bipolar technology. The AlGaAs/GaAs heterojunction bipolar transistor (HBT) is emerging as a preferred device for high speed analog, digital and microwave applications. For example, K. Poulton et al., "A 2Gs/s HBT Sample and Hold", 1988 GaAs IC Symposium, pp. 199-202 (1988), disclose an HBT IC process that produces transistors with an.function..sub.T of over 50 GHz. Similarly, M. E. Kim et al., "12-40 GHz Low Harmonic Distortion and Phase Noise Performance of GaAs Heterojunction Bipolar Transistors", 1988 GaAs IC Symposium, pp. 117-120 (1988), disclose an HBT IC process that produces transistors with an .function..sub.max .about.30-50 GHz and oscillators operating up to 37.7 GHz. HBT technology has been mostly captive, although a few companies have recently begun to offer HBT foundry services. See P. M. Asbeck et al., "HBT Application Prospects in the U.S.: Where and When?" 1991 GaAs IC Symposium Technical Digest, pp. 7-10 (1991 ).
An HBT fabrication process differs significantly from the better known MESFET or HEMT IC processes. In the MESFET or HEMT processes, implants and gate recess steps can be used to adjust the threshold voltage of the active device. In contrast, the DC properties of the HBT depend to a great extent on epitaxial growth of layers that form the heterojunction structure. The HBT process must provide isolation, ohmic contacts and other passive elements necessary for circuit realization. Establishing effective process controls for an HBT process requires careful thought and planning. The process must also provide for effective, preferably automated, electrical measurements of, for example, beta, .function..sub.T, .function..sub.max, base sheet resistance, emitter resistance, etc. The processes described in the above-referenced articles require device isolation implants, which leave behind implant damage, and do not permit effective testing until the devices are essentially complete.
One major difficulty in HBT fabrication arises in connection with etching the heterojunction layers to define the active functional regions of the devices as well as device isolation. Conventional GaAs etching processes and compositions most often use sulfuric acid or hydrochloric acid solutions. These typically produce a retrograde or undercut slope in at least one crystallographic direction on the GaAs substrate, as shown in Gallium Arsenide Processing Techniques by Ralph E. Williams, at pp. 109-123 (1984). Other GaAs etchants are listed on page 120, including H.sub.3 PO.sub.4 :H.sub.2 O.sub.2 :H.sub.2 O in a 1:1:1 ratio, but their etching characteristics other than etch rate are undisclosed. An example of a device formed with the retrograde or undercut slope are shown in FIG. 2 of the above-referenced Poulton et al article. One problem with this structure is the difficulty in getting good step coverage of subsequently-deposited metal layers. This affects metallization of the device structures. To reduce the step height, to solve the step coverage problem, the prior art uses implants into the doped lower epitaxial layers to convert them from semiconducting to semi-insulating material. To solve the metal step coverage problem typically requires planarization steps, which also introduce undue complexity to the overall process. Isolation of passive devices such as thin film resistors also requires implantation of the lower epitaxial layers, as shown in FIG. 1 of the aforementioned Kim et al article.
Accordingly, a need remains for an improved heterojunction bipolar transistor (HBT) integrated circuit fabrication process.